There is active gate control as a technique for reducing a switching loss during turning-off in a circuit that drives a voltage-driven semiconductor element such as an IGBT. For example, in Patent Literature 1, a delay device (a capacitor C1) sets a delay time so that a switching speed can be switched to a low speed when a collector voltage reaches a high-side voltage after the detection of a rise of a collector-emitter voltage VCE of the IGBT.
However, in the configuration of Patent Literature 1, when the rise time of the collector voltage varies due to variations in the gate capacitance of the IGBT or the drive current, a timing of switching the switching speed is shifted. Thus, a reduction of the switching loss may become insufficient, or an increase of a surge voltage may occur.